Very thin and/or fragile semiconductor wafers, such as wafers of Si, GaAs, InP, GaN, etc., or thin glass or ceramic substrates, such as of SiC, are widely used in microelectronics. The term “wafer” typically relates to semiconductor substrates having a round shape with a defined diameter, such as 100 mm, 150 mm, 200 mm, 300 mm, 450 mm.
For many fields of application, these wafers have to become very thin, e.g., 10 μm to 100 μm and have to pass through processing steps on their front or rear, e.g., metal deposition (sputtering), coating with photoresist (spin-coating), lithography (UV exposition), wet-chemical processes for structuring, dry-chemical processes (plasma method), layer depositions or also annealing steps (oven, hotplates). In the case of very thin wafers, handling involves a high risk of breaking. Breaking of a wafer in a semiconductor factory can mean a loss of several thousand euros. For preventing breakage, techniques have been introduced by which a stabilization substrate (=carrier-wafer, carrier substrate, carrier) can be connected to the thin wafer (temporary bonding, reversible adhesive technologies).
Adhesive-based carrier technologies are easy to handle but the polymers are frequently expensive, spin-coating methods have a high loss of material, large amounts of waste of solvent hazardous waste are accumulated and the adhesives frequently have a low temperature stability. Additionally, these adhesive-based technologies necessitate specific apparatuses and methods for bonding (vacuum bond chamber, temperature) wafer and carrier. Above that, stripping the polymers is frequently difficult and the substrates have to be elaborately disengaged and cleaned from the polymer residuals. In the last step of cleaning the process substrate, the above-mentioned stabilizing carrier substrate no longer exists, which is why the risk of breakage of the process substrate increases again.
A known alternative carrier technology uses electrostatic holding forces between a rigid carrier substrate with rechargeable electrode structures and the fragile wafer to be processed. By discharging the electrodes, wafer and carrier can be separated again. No polymers are used, there is no contamination with polymer residuals and the holding forces also act at high temperatures, e.g., at above 400° C.
U.S. Pat. No. 5,691,876 discloses a combination of the above-stated bonding technologies. An electrode is embedded between two or more layers of a polymer dielectric. This assembly is attached to the top of the wafer chuck. The polymer layers are thermoplastic and are melted onto the wafer chuck on the one hand and the wafer on the other hand by applying pressure and temperature. Thus, the assembly is firmly connected to the wafer chuck in a permanent manner and to the wafer in a temporary manner.
Apart from such electrostatic chucks that are firmly installed in process plants as massive blocks, mobile carriers are known as well. EP 1305 821 B1 discloses such a mobile carrier. This carrier is produced on rigid substrates. Here, producing the electrode structures can be performed relatively easy. However, it is very expensive to provide so-called E-carriers with rear contacts because, for example in the case of an Si substrate, the contact via through the wafer (TSV through silicon via) would need to have very good electric insulation. Above that, process steps for metal patterning have to be performed on both wafer sides.